Design and Performance Evaluation of Energy Efficient Heterogeneous Microprocessor Architectures for Real Time Signal Processing in Edge IoT Systems
Keywords:
Energy efficiency, Heterogeneous architecture, Task scheduling, Edge IoT systems, Real time processingAbstract
Edge-Internet of Things (Edge IoT) systems are increasingly integral to applications that require real time signal processing, particularly where low latency and energy efficiency are critical. This paper explores the design and performance evaluation of a heterogeneous microprocessor architecture aimed at optimizing energy consumption and real time performance. The heterogeneous architecture integrates multiple types of cores, such as Central Processing Units (CPUs), Digital Signal Processors (DSPs), and Graphics Processing Units (GPUs), to allocate tasks based on computational demand. The proposed design significantly reduces energy consumption, particularly during high-performance tasks, while maintaining real time processing guarantees. Simulation-based performance evaluation was conducted to assess the energy efficiency, latency, and overall system performance under varying workloads, including real time Digital Signal Processing (DSP) benchmarks. The results showed that the heterogeneous architecture outperformed traditional homogeneous processors, demonstrating up to a 19-fold improvement in energy efficiency. Furthermore, the system reduced latency by up to 45% in real time applications, making it particularly suitable for Edge IoT environments such as industrial automation and smart healthcare, where both performance and energy efficiency are critical. Despite some trade-offs in task scheduling complexity, the heterogeneous design was able to balance power consumption and computational performance effectively. The findings suggest that this architecture can serve as a foundation for future Edge IoT systems, providing significant advantages in terms of energy efficiency, real time processing, and scalability. Future work will focus on further optimization of the architecture and exploring its application across various IoT environments.
References
[1] A. S. Rajawat, R. K. Arora, M. Muqeem, S. M. Faisal, and M. K. Jamal, “Enhancing IoT Efficiency by Minimizing Latency and Boosting Real-Time Processing with Edge Computing,” SN Comput. Sci., vol. 6, no. 6, 2025, doi: 10.1007/s42979-025-04192-x.
[2] F. Diop, B. M. Faye, and I. Niang, “Edge- AI and Internet of Things for Intelligent Systems: Architectures, Applications and Future Perspectives,” Lect. Notes Inst. Comput. Sci. Soc. Telecommun. Eng. LNICST, vol. 588 LNICST, pp. 111 – 122, 2025, doi: 10.1007/978-3-031-81573-7_9.
[3] A. Anandhavalli and A. Bhuvaneswari, “IoT Edge Computing Security Framework Powered by LSA, MLKEM and GLSKM,” Int. J. Eng. Trends Technol., vol. 73, no. 3, pp. 198 – 211, 2025, doi: 10.14445/22315381/IJETT-V73I3P115.
[4] E. Oliveira, A. R. da Rocha, M. Mattoso, and F. C. Delicato, “Latency and Energy-Awareness in Data Stream Processing for Edge Based IoT Systems,” J. Grid Comput., vol. 20, no. 3, 2022, doi: 10.1007/s10723-022-09611-4.
[5] S. Dustdar and I. Murturi, “Towards distributed edge-based systems,” in Proceedings - 2020 IEEE 2nd International Conference on Cognitive Machine Intelligence, CogMI 2020, 2020, pp. 92 – 100. doi: 10.1109/CogMI50398.2020.00021.
[6] V. S. Chua et al., “Visual IoT: Ultra-Low-Power Processing Architectures and Implications,” IEEE Micro, vol. 37, no. 6, pp. 52 – 61, 2017, doi: 10.1109/MM.2017.4241343.
[7] S. Gupta et al., “Intelligent resource optimization for scalable and energy-efficient heterogeneous IoT devices,” Multimed. Tools Appl., vol. 83, no. 35, pp. 82343 – 82367, 2024, doi: 10.1007/s11042-024-18176-1.
[8] N. Rathore, M. Savaliya, M. Patel, S. Gautam, and R. R. Naik, “Software Architecture Survey From an Edge Computing Perspective,” in 2024 1st International Conference on Cognitive, Green and Ubiquitous Computing, IC-CGU 2024, 2024. doi: 10.1109/IC-CGU58078.2024.10530838.
[9] A. Gamatie, G. Devic, G. Sassatelli, S. Bernabovi, P. Naudin, and M. Chapman, “Towards Energy-Efficient Heterogeneous Multicore Architectures for Edge Computing,” IEEE Access, vol. 7, pp. 49474 – 49491, 2019, doi: 10.1109/ACCESS.2019.2910932.
[10] T. Mitra, “Energy-efficient computing with heterogeneous multi-cores,” in Proceedings of the 14th International Symposium on Integrated Circuits, ISIC 2014, 2015, pp. 63 – 66. doi: 10.1109/ISICIR.2014.7029584.
[11] S. Gupta et al., “Adaptive fuzzy convolutional neural network for medical image classification,” J. Intell. Fuzzy Syst., vol. 45, no. 6, pp. 9785 – 9801, 2023, doi: 10.3233/JIFS-233819.
[12] S. K. Bhat, A. Saya, H. K. Rawat, A. Barbalace, and B. Ravindran, “Harnessing energy efficiency of heterogeneous-ISA platforms,” in Operating Systems Review (ACM), 2016, pp. 65 – 69. doi: 10.1145/2883591.2883605.
[13] V. Gupta et al., “The forgotten ‘Uncore’: On the energy-efficiency of heterogeneous cores,” in Proceedings of the 2012 USENIX Annual Technical Conference, USENIX ATC 2012, 2019, pp. 367 – 372. [Online]. Available: https://www.scopus.com/inward/record.uri?eid=2-s2.0-85077127467&partnerID=40&md5=4bbf5f8fc12ffdf3fbbcb9870155ab44
[14] D. Prerad, Z. Ivanovic, and A. Avramovic, “Edge AI Acceleration Using OpenCL Framework on NXP i.MX 8M Nano SoM,” in 2024 15th International Symposium on Industrial Electronics and Applications, INDEL 2024 - Proceedings, 2024. doi: 10.1109/INDEL62640.2024.10772692.
[15] A. F. Abdulqader et al., “Optimizing IoT Performance Through Edge Computing: Reducing Latency, Enhancing Bandwidth Efficiency, and Strengthening Security for 2025 Applications,” in Conference of Open Innovation Association, FRUCT, 2024, pp. 145 – 158. doi: 10.23919/FRUCT64283.2024.10749858.
[16] B. Yuan, D. Chen, D. Xu, and M. Chen, “Conceptual model of real-time IoT systems,” Front. Inf. Technol. Electron. Eng., vol. 20, no. 11, pp. 1457 – 1464, 2019, doi: 10.1631/FITEE.1900115.
[17] A. Alsalemi, Y. Himeur, F. Bensaali, and A. Amira, “An innovative edge-based Internet of Energy solution for promoting energy saving in buildings,” Sustain. Cities Soc., vol. 78, 2022, doi: 10.1016/j.scs.2021.103571.
[18] S. Reif et al., “X-Leep: Leveraging Cross-Layer Pacing for Energy-Efficient Edge Systems,” in e-Energy 2020 - Proceedings of the 11th ACM International Conference on Future Energy Systems, 2020, pp. 548 – 553. doi: 10.1145/3396851.3402924.
[19] Y. Zhai, M. Mudassar, and L. Zhu, “Edge Computing Resilience: Overcoming Resource Constraints in Unstable Computing Environments,” SpringerBriefs Comput. Sci., vol. Part F3510, pp. 1 – 123, 2024, doi: 10.1007/978-981-97-6998-8.
[20] G. Kornaros, MULTI-CORE EMBEDDED SYSTEMS. 2018. doi: 10.1201/9781315218199.
[21] W. Qu and F.-H. Yu, “Survey of Research on Asymmetric Embedded System Based on Multi-core Processor; [基于多核处理器的非对称嵌入式系统研究综述],” Comput. Sci., vol. 48, no. 6 A, pp. 538 – 542, 2021, doi: 10.11896/jsjkx.200900204.
[22] R. Bonamy et al., “Energy efficient mapping on manycore with dynamic and partial reconfiguration: Application to a smart camera,” Int. J. Circuit Theory Appl., vol. 46, no. 9, pp. 1648 – 1662, 2018, doi: 10.1002/cta.2508.
[23] M. M. Jassim, E. S. Abbas, Z. S. T. Zaki, S. D. Abdulameer, and M. Barakat, “Optimizing Energy Efficiency in Multi-Core Processors: A Comparative Study of Hardware Technique,” Radioelektronika, Nanosistemy, Inf. Tehnol., vol. 16, no. 6, pp. 813 – 826, 2024, doi: 10.17725/j.rensit.2024.16.813.
[24] H. S. A. Kamal, S. A. Ishak, and M. W. Shobak, “A Survey on Energy-Aware Scheduling using Genetic Algorithms,” in 2022 2nd International Conference on Intelligent Cybernetics Technology and Applications, ICICyTA 2022, 2022, pp. 59 – 64. doi: 10.1109/ICICyTA57421.2022.10038154.
[25] U. A. Khan et al., “Latency Reduction in Optical Metro Networks,” in Proceedings - 2020 23rd IEEE International Multi-Topic Conference, INMIC 2020, 2020. doi: 10.1109/INMIC50486.2020.9318214.
[26] D. Brückmann, K. Konrad, and T. Werthwein, Concepts for hardware-efficient implementation of continuous-time digital signal processing. 2015. doi: 10.1201/b19013.
[27] A. K. Sampath, Savita, M. P. Karthikeyan, and A. C. Ramola, “Strategies to Minimize Network Latency for Better Electromagnetic Compatibility,” Lect. Notes Electr. Eng., vol. 1274 LNEE, pp. 105 – 111, 2025, doi: 10.1007/978-981-97-8043-3_17.


